An MRAM is a hopeful nonvolatile memory from the viewpoint of high integration and high speed operation. In the MRAM, the magnetic resistance element showing Magnetic Resistance Effect such as a TMR (Tunnel Magneto Resistance) is used. Specifically, the magnetic resistance element has a magnetic tunnel junction (MTJ) in which a tunnel barrier layer is put between two ferromagnetic layers, and this is referred to as an MTJ element. The two ferromagnetic layers are a pinned layer whose magnetization orientation is fixed, and a free layer whose magnetization orientation can be inverted.
A resistance value (R+ΔR) of the MTJ when the magnetization orientations of the pinned layer and that of the free layer are “anti-parallel” is known to be larger than a resistance value (R) when they are “parallel” depending on the magnetic resistance element. An MR ratio (ΔR/R) is known to be between several 10% and several 100%. In the MRAM, a data is stored in a non-volatile manner by using such an MTJ element for a memory cell, and using the change in the resistance value. A read operation is carried out by supplying current through the MTJ element to detect the resistance value. A write operation into the memory cell is carried out by inverting the magnetization orientation of the free layer.
As write methods into the MRAM, an asteroid method and a toggle method have been conventionally known. According to these write methods, the inverting magnetic field required to invert the magnetization of the free layer increases substantially reversely proportional to a memory cell size. In short, there is a tendency that, as the memory cell is made smaller, write current becomes greater.
As a write method that can suppress increase in write current which is caused due to a fine structure, a “spin transfer method” has been proposed. For example, please refer to Japanese Patent Application Publications (JP-P2004-207707A, JP-P2005-19561A, and JP-P 2006-93432A), “A Novel Nonvolatile Memory with Spin Torque Transfer Magnetization Switching: Spin-RAM” by H. Hosomi, et al. (International Electron Devices Meeting, Technical Digest, pp. 473-476, 2005). According to the spin transfer method, a spin-polarized current is injected into a ferromagnetic conductor, and the magnetization is inverted through interaction between a spin of each carrier electrons for the current and a magnetic moment of the conductor (hereafter, to be referred to as “spin transfer magnetization switching”). The outline of the spin transfer magnetization switching will be described below with reference to FIG. 1.
In FIG. 1, an MTJ element 1 includes a free layer 2 and a pinned layer 4, which are magnetic layers, and a tunnel barrier layer 3 of a non-magnetic layer which is put between the free layer 2 and the pinned layer 4. Here, the pinned layer 4 whose magnetization orientation is fixed is formed to be thicker than the free layer 2 and carries out the role as a mechanism (spin filter) for generating the spin-polarized current. A situation in which the magnetization orientation of the free layer 2 and that of the pinned layer 4 are parallel corresponds to a data “0”, and a situation in which they are i-parallel corresponds to a data “1”.
The spin transfer magnetization inversion shown in FIG. 1 is attained by a CPP (Current Perpendicular to Plane) method, and a write current IW is perpendicularly injected to the film plane. Specifically, at the time of transition from the data “0” to the data “1”, the write current IW flows from the pinned layer 4 to the free layer 2. In this case, the electron having the same spin state as the pinned layer 4 serving as the spin filter moves from the free layer 2 to the pinned layer 4. Then, through the spin transfer (the transfer/reception of a spin angle motion amount) effect, the magnetization of the free layer 2 is inverted. On the other hand, at the time of the transition from the data “1” to the data “0”, the write current IW flows from the free layer 2 to the pinned layer 4. In this case, the electron having the same spin state as the pinned layer 4 serving as the spin filter moves from the pinned layer 4 to the free layer 2. As a result, by the spin transfer effect, the magnetization of the free layer 2 is inverted.
In this way, in the spin transfer magnetization inversion, the data is written through the movement of the spin electron. On the basis of the direction of the spin-polarized current that is injected perpendicularly to the film plane, it is possible to define the magnetization orientation of the free layer 2. Here, the threshold of the write (the magnetization inversion) is known to be based on a current density. Thus, as the memory cell size is made smaller, the write current necessary for the magnetization inversion is decreased. Since the write current is decreased in association with the finer structure of the memory cell, the spin transfer magnetization inversion is important to attain a large capacity of MRAM.
FIGS. 2A and 2B show one memory cell and schematically show a conventional circuit configuration to select the memory cell and attain the two-way write current IW. One memory cell has the MTJ element 1 and a selection transistor TP. One end of the MTJ element 1 is connected to a bit line BL, and the other end is connected to the selection transistor TR. One of source/drain electrodes of the selection transistor TR is connected to the MTJ element 1, and the other electrode is connected to a plate line PL. A voltage of the plate line PL is fixed to a middle voltage Vp1 (=Vdd/2). A gate electrode of the selection transistor TR is connected to a word line WL.
When a data is written, the power supply voltage Vdd is applied to the word line WL. Consequently, the selection transistor TR is turned ON. When “0” is written, as shown in FIG. 2A, the power supply voltage Vdd is applied to the bit line BL. As a result, the write current IW flows from the bit line BL (voltage Vdd) to the plate line PL (voltage Vpl). On the other hand, when “1” is written, as shown in FIG. 2B, a ground potential is applied to the bit line BL. As a result, the write current IW flows from the plate line PL (voltage Vpl) to the bit line BL (voltage 0). In this way, the write current IW can be supplied in the two ways to the MTJ element 1.